SiFive is the first fabless semiconductor company to build customized silicon based on the free and open RISC-V instruction set architecture.

With its new, first-of-its-kind Linux-compatible multi-core CPU, SiFive is moving to pushing the open source RISC-V architecture into an expanded world of use cases, including machine learning and IoT.

SiFive is the first fabless semiconductor company to build customized silicon based on the free and open RISC-V instruction set architecture.

Based on the success of the HiFive Unleashed and Linux software ecosystem enablement, the HiFive Unmatched ushers in a new era of RISC-V Linux development with a high performance development platform in a standard PC form factor.

SemiAnalysis believes this will be the first truly high-performance RISC V design! We are still not sure what their business model is. Licensing, datacenter, mobile, or building until they are acquired by a larger firm all could be viable. Regardless, there…

Minimal assembler and ecosystem for bare-metal RISC-V development - theandrew168/bronzebeard

RISC-V is gaining traction in Arm's territory.

Assemble 128-bit RISC-V. Contribute to fwsGonzo/bigassm development by creating an account on GitHub.

There is a growing number of vendors big and small going hard to the hoop to make processors for artificial intelligence workloads. AI and machine

EPAC accelerator runs its first 'Hello, World!' in-silico

RISC-V, a new chip architecture, is making its way in the tech world. Find out more about its background and how it’s supported in FreeBSD in this article.

Nios® V soft processor is based on the open-source RISC-V ISA.

Alibaba open-source its high-performance Xuantie RISC-V Cores; introduces a new in-house Armv9 server chip

As it appears Intel's attempt to gobble the upstart collapses

Abstraction is the key to custom processor design and verification, but defining the right language and tool flow is a work in progress.