RTL To GDSII: Installation and Tools Hands on Experience | Udemy

Master the RTL to GDSII flow with hands-on EDA tool installation, Logic Synthesis, and Physical Design placement/routing

2.5 hours • 11 lectures

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📶 Rating: 5.0 ⭐️ (3 reviews)
📅 Last updated: 05/26
🎓 Instructor: AK APT LOGICS

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System Verilog : Fully Hands on Learning Experience | Udemy

Master SystemVerilog with hands-on RTL coding, verification, assertions, UVM basics & industry-level projects

1 hour • 5 lectures

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📶 Rating: 4.5 ⭐️ (1 reviews)
📅 Last updated: 04/26
🎓 Instructor: AK APT LOGICS

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Arduino : Fully Hands on Learning Experience | Udemy

Learn Arduino from LED blinking to sensor‑based mini projects using C/C++ code, serial monitor, and hands‑on circuits.

2 hours • 7 lectures

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📶 Rating: 4.3 ⭐️ (6 reviews)
📅 Last updated: 03/26
🎓 Instructor: AK APT LOGICS

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NCA-GENL: SoAI-Certified Generative AI LLMs Specialization | Udemy

Complete Guide to Passing NCA-GENL Exam: Generative AI, LLMs, Prompting, and Model Deployment - School of AI

2 hours • 36 lectures • 11 quizzes.

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📶 Rating: 4.4 ⭐️ (76 reviews)
📅 Last updated: 03/26
🎓 Instructor: Vivian Aranha +1

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PCIe Gen7 PIPE Interface Explained | Udemy

Understand PCIe PIPE interface, MAC-PHY handshake, PIPE signals, LTSSM flow, and real-world design concepts

1 hour • 16 lectures

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📶 Rating: 4.6 ⭐️ (45 reviews)
📅 Last updated: 01/26
🎓 Instructor: Practice VLSI

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UVM : Interview Preparation and Practice Tests | Udemy

500+ UVM practice questions with explanations: factory, config_db, phasing, TLM, sequences, RAL, debug & interview prep

511 questions • 6 practice tests. • 6 quizzes.

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📶 Rating: 4.7 ⭐️ (3 reviews)
📅 Last updated: 07/26
🎓 Instructor: Practice VLSI

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SystemVerilog Interview & Exam Prep || Certification [VLSI] | Udemy

Test your SystemVerilog knowledge: data types, OOP, randomization, functional coverage & assertions.

48 questions • 6 practice tests. • 6 quizzes.

⏳ 51 coupon uses left ⚠️
📶 Rating: 4.5 ⭐️ (2 reviews)
📅 Last updated: 10/26
🎓 Instructor: Practice VLSI

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VLSI Testing & Design for Testability (DFT): Complete Course | Udemy

Learn VLSI Testing, Fault Simulation, ATPG, Sequential Circuit Testing, Memory Testing and Built-In Self-Test (BIST).

19.5 hours • 14 lectures

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📶 Rating: 4.6 ⭐️ (4 reviews)
📅 Last updated: 10/26
🎓 Instructor: VLSI LEARNING HUB

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Advanced Verilog HDL — Sequential Logic, Counters & FSMs | Udemy

Master RTL Design, Registers, Counters, PWM, Finite State Machines, Timing Analysis and FPGA Clocking with Verilog HDL

9.5 hours • 42 lectures

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📶 Rating: 0 ⭐️ (0 reviews)
📅 Last updated: 10/26
🎓 Instructor: Eddin VLSI labs

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Verilog HDL for Beginners — Digital Logic & RTL Design | Udemy

Master Verilog HDL, RTL coding, digital logic design, adders, ALU, multiplexers, decoders, encoders, and combinational

6 hours • 23 lectures

⏳ 53 coupon uses left ⚠️
📶 Rating: 5.0 ⭐️ (4 reviews)
📅 Last updated: 10/26
🎓 Instructor: Eddin VLSI labs

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