Finding all subsequence of an array using Recursion https://t.co/lnVfOiB3jA #github #C++ #Java #Python #C #HTML #JavaScript #MATLAB #C# #PHP #SystemVerilog #Assembly #Go #Dart #Haskell #Ruby #Rust #Kotlin #PowerShell #Makefile #TypeScript #Shell
— first-issues (@first_issues) October 7, 2020
— first-issues (@first_issues) October 7, 2020
Document how cocotb sets values on signals https://t.co/uw2PE24bg0 #github #Python #C++ #VHDL #C #Makefile #Verilog #SystemVerilog #Coq #Dockerfile
— first-issues (@first_issues) October 26, 2020
— first-issues (@first_issues) October 26, 2020
GitHub
Document how cocotb sets values on signals · Issue #2160 · cocotb/cocotb
Cocotb deposits values on signals. It does not behave like another driver. This should be made more explicit. And this is where the documentation for Force, Release, and Freeze should go, not in th...
Try out svlint https://t.co/DiewFwStKf #github #SystemVerilog #Python #Makefile #C++ #Tcl #Shell #Filebench WML #Stata #HTML #Verilog #Forth #Emacs Lisp
— first-issues (@first_issues) October 27, 2020
— first-issues (@first_issues) October 27, 2020
GitHub
Try out svlint · Issue #644 · lowRISC/ibex
I just found https://github.com/dalance/svlint and would be interested how it copes with the ibex code base.
[Handshake] Make BufferOp `sequential` attribute a unit attribute https://t.co/3Uhvc6q8fX #github #C++ #MLIR #Python #CMake #C #Verilog #Shell #SystemVerilog #Cap'n Proto #Tcl
— first-issues (@first_issues) Jan 9, 2022
— first-issues (@first_issues) Jan 9, 2022
GitHub
[Handshake] Make BufferOp `sequential` attribute a unit attribute · Issue #2437 · llvm/circt
Currently, this attribute is a boolean attribute. However, when false, we emit a FIFO, and when true, a sequential buffer. For these semantics, it would make more sense to have it as a unit attribute.
Refactoring for the CV32E40X test-program definitions https://t.co/bWwDo9qKnV #github #Assembly #SystemVerilog #C #Makefile #Python #C++ #Tcl #Shell #Jinja #Filebench WML
— first-issues (@first_issues) Jan 12, 2022
— first-issues (@first_issues) Jan 12, 2022
GitHub
Refactoring for the CV32E40X test-program definitions · Issue #1107 · openhwgroup/core-v-verif
Task Outcome Removal of all deprecated toolchain selection parameters in the test-program definitions for the CV32E40X. Background information As documented in the toolchain selection sub-section o...
[HandshakeToFIRRTL] Add option for Index bit width https://t.co/5PLWJ7b1hy #github #C++ #MLIR #Python #CMake #C #Verilog #Shell #SystemVerilog #Cap'n Proto #Tcl
— first-issues (@first_issues) Jan 14, 2022
— first-issues (@first_issues) Jan 14, 2022
GitHub
[HandshakeToFIRRTL] Add option for Index bit width · Issue #2458 · llvm/circt
Currently, any index-typed values will be emitted as 64-bit wide signals. Unsurprisingly, testing shows that this can have a huge overhead in circuits. Eventually we want to have a proper (path- an...
document configuring logger to separate simulator and cocotb logs https://t.co/7BszvsPWze #github #Python #C++ #VHDL #C #Makefile #Verilog #SystemVerilog #PowerShell
— First Issues Bot (@first_issues) Jan 22, 2022
— First Issues Bot (@first_issues) Jan 22, 2022
GitHub
document configuring logger to separate simulator and cocotb logs · Issue #2835 · cocotb/cocotb
#23 was closed, and a follow on action was to document how to configure the cocotb logger to separate it and the simulator stdout.
Postfix Application Operator https://t.co/1tHHsTeyAS #github #SystemVerilog #Java #Shell #Python #Emacs Lisp #Vim script #JavaScript #Tcl #Nix
— First Issues Bot (@first_issues) Jan 25, 2022
— First Issues Bot (@first_issues) Jan 25, 2022
GitHub
Postfix Application Operator · Issue #625 · melt-umn/silver
Sometimes there's Silver code like: top.foo = filter(someFunction, filter(someOtherFunction, flatMap(idkAnEnvLookupOrSomething, myThings))); but I find this slightly hard to read. With OCam...
`train_and_evaluate` function only trains once https://t.co/EozddpQhMH #github #SystemVerilog #Java #Shell #Python #Emacs Lisp #Vim script #JavaScript #Tcl #Nix #Python #Jupyter Notebook #Shell
— First Issues Bot (@first_issues) Jan 25, 2022
— First Issues Bot (@first_issues) Jan 25, 2022
GitHub
`train_and_evaluate` function only trains once · Issue #104 · AI4Finance-Foundation/ElegantRL
import gym from elegantrl.agent import AgentModSAC from elegantrl.config import get_gym_env_args, Arguments from elegantrl.run import * gym.logger.set_level(40) # Block warning env_func = gym.make ...
Uses of malloc()'ed pointers without NULL check https://t.co/KpxCS9PvCM #github #C #Verilog #Python #Perl #Assembly #M4 #SystemVerilog #Shell #Makefile #HTML #Lua #Ruby #JavaScript #Dockerfile
— First Issues Bot (@first_issues) Jan 31, 2022
— First Issues Bot (@first_issues) Jan 31, 2022
GitHub
Uses of malloc()'ed pointers without NULL check · Issue #5035 · openwall/john
As reported in #5028 and https://huntr.dev/bounties/315d2d54-6ae4-47a1-a6ff-84fea6cb7d01/ by @michaellrowley with assistance of @JamieSlome and @huntr-helper (how many engineers does it take to get...
Use stderr https://t.co/KfJctQQ409 #github #SystemVerilog #Java #Shell #Python #Emacs Lisp #Vim script #JavaScript #Tcl #Nix
— First Issues Bot (@first_issues) Feb 1, 2022
— First Issues Bot (@first_issues) Feb 1, 2022
GitHub
Use stderr · Issue #633 · melt-umn/silver
Currently, there's no way to write to stderr besides opening /dev/stderr as a file. Diagnostics (e.g. Found foo:bar) and errors should be written there, so they don't break piping s...
Feature Request: Customizable Text objects https://t.co/fkTBxAQm3D #github #SystemVerilog #Java #Shell #Python #Emacs Lisp #Vim script #JavaScript #Tcl #Nix #TypeScript #Svelte #HTML #SCSS #JavaScript #PHP #Jsonnet #Dockerfile #Ruby #Shell
— First Issues Bot (@first_issues) Feb 1, 2022
— First Issues Bot (@first_issues) Feb 1, 2022
GitHub
Feature Request: Customizable Text objects · Issue #1806 · thecodingmachine/workadventure
WA already supports displaying Text that is placed through an Object Layer. But I cannot find a way to change the text based on variables. What I want to achieve: There are 3 Rooms, but the topic o...
Interpreter moder to validate `@bound` assignments https://t.co/T48R99jfkS #github #Rust #Python #SystemVerilog #C++ #JavaScript #CSS #Tcl #Emacs Lisp #HTML #Vim script #Dockerfile #Shell #jq
— First Issues Bot (@first_issues) Feb 9, 2022
— First Issues Bot (@first_issues) Feb 9, 2022
GitHub
Interpreter moder to validate `@bound` assignments · Issue #900 · cucapra/calyx
The interpreter can provide two capabilities that would be useful: It can use the @bound annotation instead of the loop condition to decide when to exit a loop, and It can validate existing @bound ...
[Feature] Allow to run migrations manually https://t.co/J8fSx60irO #github #Rust #Python #SystemVerilog #C++ #JavaScript #CSS #Tcl #Emacs Lisp #HTML #Vim script #Dockerfile #Shell #jq #Java #JavaScript #Kotlin #CSS #HTML #Shell
— First Issues Bot (@first_issues) Feb 9, 2022
— First Issues Bot (@first_issues) Feb 9, 2022
GitHub
[Feature] Allow to run migrations manually · Issue #356 · jobrunr/jobrunr
Is your feature request related to a problem? Please describe. I'm working on a project which is capable of resetting and migrating the currently running database through an endpoint. Datab...
Flask routes https://t.co/CoHUREuvaY #github #Rust #Python #SystemVerilog #C++ #JavaScript #CSS #Tcl #Emacs Lisp #HTML #Vim script #Dockerfile #Shell #jq #Java #JavaScript #Kotlin #CSS #HTML #Shell #Python
— First Issues Bot (@first_issues) Feb 9, 2022
— First Issues Bot (@first_issues) Feb 9, 2022
GitHub
Flask routes · Issue #9 · VMagnify/VMagnify
Creation of the Flask routes.
make sure all flags show up in --help https://t.co/3LsPuuUeYt #github #SystemVerilog #Java #Shell #Python #Emacs Lisp #Vim script #JavaScript #Tcl #Nix
— First Issues Bot (@first_issues) Feb 9, 2022
— First Issues Bot (@first_issues) Feb 9, 2022
DIR-3040 Firmware not update https://t.co/WNQA5GbaIB #github #Roff #Vim script #C #HTML #Tcl #Perl #M4 #TeX #Ruby #Shell #JavaScript #Prolog #PostScript #GAP #Makefile #Emacs Lisp #NewLisp #Python #SystemVerilog #Smalltalk #CSS #C++ #Awk #Slash #sed #Batchfile
— First Issues Bot (@first_issues) Feb 24, 2022
— First Issues Bot (@first_issues) Feb 24, 2022
GitHub
DIR-3040 Firmware not update · Issue #10 · i3roly/glibc_ddwrt
Hi friend, I'm trying to apply firmware in my device but allways received failure to update with archive: factory-to-ddwrt-SE.bin My device information: DIR-3040 HW:A1 FW:1.20 You can help ...
Incorrect path to https://t.co/BXWOWB5Usa in mio3.yaml https://t.co/bDODX8JtLe #github #Python #Verilog #SystemVerilog #Tcl
— First Issues Bot (@first_issues) Mar 1, 2022
— First Issues Bot (@first_issues) Mar 1, 2022
Evaluator doesn't reduce some self comparisons https://t.co/BTJm50U1Lb #github #Bluespec #Haskell #Emacs Lisp #Verilog #VHDL #SystemVerilog #C++ #Makefile #Tcl #C #Shell #SuperCollider #HTML #Perl #Vim script #Batchfile #Smalltalk #Roff #Python #Dockerfile #sed
— First Issues Bot (@first_issues) Mar 4, 2022
— First Issues Bot (@first_issues) Mar 4, 2022
GitHub
Evaluator doesn't reduce some self comparisons · Issue #460 · B-Lang-org/bsc
The evaluator is able to reduce rg == rg and rg != rg (to True and False), but doesn't reduce expressions with <, <=, >, or >=. This can be seen in the following...
A dialect for scheduling problems https://t.co/w3BAbKPRsk #github #C++ #MLIR #Python #CMake #C #Verilog #Shell #SystemVerilog #Cap'n Proto #PowerShell #Tcl
— First Issues Bot (@first_issues) Mar 13, 2022
— First Issues Bot (@first_issues) Mar 13, 2022
GitHub
A dialect for scheduling problems · Issue #2760 · llvm/circt
@mikeurbach and I think it would be useful to have an import/export format for scheduling problem instances, e.g. for writing test cases and benchmarking independent from the concrete (and potentia...